Samsung has developed another solution to make Exynos chips cooler

Samsung’s in-house smartphone chips are often criticized for overheating and consuming more power than rival chips. Over the past couple of years, Samsung has largely solved those issues. Its most recent chip, the Exynos 2600, uses a new technology called Heat Path Block (HPB) for improved heat dissipation. In the future, it could use one more technology to further improve heat dissipation.

Current Exynos chips use a Fan-Out Wafer Level Package (FOWLP) structure, which places input and output terminals outside the chip to reduce heat generation inside the chip. Moreover, it also uses the HPB, which is a thin copper layer that helps dissipate the processor’s heat faster. However, the DRAM and the HPB are both placed on top of the processor, which means the HPB can only dissipate heat generated by the processor and not the DRAM.

In future Exynos chips, Samsung is reportedly planning to use a side-by-side (SbS) packaging structure. In this structure, the DRAM and the processor are placed side by side, and HPB is on top of both of them. This way, the HPB can quickly dissipate heat generated by both the Exynos processor and the DRAM. It also makes the chip package vertically thinner, making it easier to fit into thin smartphones.

But SbS also has a disadvantage. As the DRAM and the processor are placed side by side, the horizontal surface area of the package increases, while its vertical height decreases. If phone manufacturers (like Samsung’s smartphone division) don’t have any issue with increased package area, Samsung’s chip division could use the SbS structure in all Exynos chips in the medium to long term.

Exynos chips with the SbS packaging structure might first appear in Galaxy Z series phones due to their greater need for thinness.